ADC Interrupt Status and Clear Register
AVG_SAMPLE_RDY | Status and clear for DONE0 interrupt. Read 1: Analog logic has delivered the number of samples set in the ADC_AVG_NUM register, indicating that the current ADC_SAMPLE_REG_n has been loaded. Write 1 to clear. |
ALL_SAMPLES_TAKEN | Status and clear for DONE1 interrupt. Read 1: Data collection has now stopped with the final loading of a ADC_SAMPLE_REG_n register, due to either turning off ADC_START_SRC[START] for continuous operation, or ADC_CONTROL[START] one-time run has finished. Write 1 to clear. |
AVG_CALC_THRESH_0 | Status and clear for CMPA interrupt. Read 1: A threshold passed depending on ADC_CONTROL[INT_CTRL] register field. Write 1 to clear. |
AVG_CALC_THRESH_1 | Status and clear for CMPB interrupt. Read 1: A threshold passed depending on ADC_CONTROL[INT_CTRL] register field. Write 1 to clear. |